Semiconductor Engineering

Limiting AI/ML Tools To Ensure Physical AI Safety, Security

Tools designed to verify and monitor physical AI systems offer value, but human oversight is needed to prevent accidents and unexpected behavior.
Semiconductor Engineering

Paradigms Of Large Language Model Applications In Functional Verification

This paper presents a comprehensive literature review for applying large language models (LLM) in multiple aspects of functional verification. Despite the promising advancements offered by this new ...
Electronics For You

Accelerating RISC-V Verification With Quality And Security At The Core

As the RISC-V ecosystem grows, startups struggle to verify complex chips before tape-out. Chennai-based startup addresses ...
The Next Platform

Reduce Manual Effort, Achieve Better Coverage With AI And Formal Techniques

PARTNER CONTENT Given the size and complexity of modern semiconductor designs, functional verification has become a dominant phase in the development cycle. Coverage lies at the very heart of this ...
EDN

Functional verification tool adds X-Robust

The Ascent early functional verification solution for ASIC and FPGA designs now includes the first commercially available automated solution to ensure X-robust designs. Explicit and implicit X sources ...
EDN

A closer look at security verification for RISC-V processors

Verifying the security of processors has become an essential step in the design of modern electronic systems. Users want to be sure that their consumer devices can’t be hacked, and that their personal ...
Electronic Design

Functional Verification Suite Covers More In Less Time

The latest release of Specman Elite (version 4) delivers significantly improved functional verification performance. With a 27% average speed increase for compiled mode and about 15% for interpreted ...