IP Cores, Inc. announces an ultracompact IP core supporting the NIST FIPS 46-3 Data Encryption Standard (DES) and Triple DES (TDEA). Starting at 3K ASIC gates, DES1 core provides an efficient solution ...

San Jose, Calif. – Tool vendor Magma Design Automation Inc. has formed a series of alliances with silicon intellectual-property providers to fit their IP into the Magma tool flow. Companies in the ...

The demand on Ethernet networks in automotive, industrial, and safety-critical applications is increasing rapidly: ever higher data rates must be combined with precisely predictable timing. The ...

Viterbi and Reed-Solomon encoder and decoder intellectual-property (IP) cores from 4i2i Communications Ltd. have been optimized for use with Actel Corp.'s nonvolatile, single-chip ProASICPlus, ...

HILLSBORO, Ore.--(BUSINESS WIRE)--Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced a new version of Lattice Propel™, a design environment for ...

All three cores are available in synthesizable VHDL or Verilog and are verified using Artisan Components' TSMC 0.18-µm standard cell library. They come with cycle- and bit-accurate ANSI C++ or SystemC ...

ATHENS, Greece--(BUSINESS WIRE)--IP Highlights: - Fully compliant with VESA DSC 1.2b and backwards compatible with DSC 1.1 - Ultra-low latency visually lossless image compression for all types of ...

Fibre Channel intellectual property (IP) cores have been developed for FPGAs, with the cores presently optimized for Stratix, Stratix GX, Cyclone, and Hardcopy devices. Initial offerings include three ...

Semiconductor intellectual property (IP) management, reuse, and change tracking are essential for efficiently creating chip designs based on proven building blocks, reducing your time-to-market, and ...

Fraunhofer IPMS has developed a new 10G Time‑Sensitive Networking (TSN) endpoint IP core that’s been designed to meet growing demands for deterministic, high‑bandwidth Ethernet in automotive, ...