Semiconductor manufacturer Xanoptix (Merrimack, NH) has developed a wafer-scale process for the 3-D stacking of silicon with either GaAs or InP to make compound semiconductors. The company's Hybrid ...
In the center of this technological transition, Future Leading SiSiC/RBSIC/silcon carbide Cantilever Paddle products are emerging as a key solution for stable wafer handling and continuous kiln ...
Hongyuan Green Energy says it has produced a first batch of 40 µm monocrystalline silicon wafers that support full-size and half-cut formats, with slicing completed using the company’s in-house ...
Veeco Instruments and research organisation imec have jointly developed a manufacturing process that enables the integration ...
Major processes in semiconductor wafer fabrication: 1) wafer preparation, 2) pattern transfer, 3) doping, 4) deposition, 5) etching, and 6) packaging. The process of creating semiconductors can be ...
The 300mm silicon carbide wafer targets higher production capacity for power electronics and advanced system integration.
From large TSVs for MEMS to nanoTSVs for backside power delivery, cost-effective process flows for these interconnects are essential for making 2.5D and 3D packages more feasible. Through-silicon vias ...
Oct 29, 2024, Munich – 29 October 2024 – Infineon Technologies AG (FSE: IFX / OTCQX: IFNNY) announced it has unveiled an advance in handling and processing “the thinnest silicon power wafers ever ...
Scientists in China have investigated the fracture strength of commercial G12 monocrystalline wafers via the 4-point bending test and have found that wafer thickness, the position of the silicon wafer ...
This is a fragment of a small silicon wafer, on which are etched several integrated circuitsl, which performed the basic logic of the Apollo Guidance Computer. Creating an integrated circuit was a ...
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