Imagine a scenario in which your design team has received the marketing department's requirements for a next-generation SoC design. But as often happens, before you can finish the lengthy design cycle ...
Exploiting a dramatic improvement in the digital density of its super-smart power technology, SMARTMOS, Motorola's Semiconductor Products Sector (SPS) has created a design platform for complex ...
Last week, I wrote several blog entries that discussed old and obsolete ideas contained in the popular and successful Reuse Methodology Manual (the RMM), which ushered in the SOC era back in 1997. I ...
The demand for new and upgraded features is increasing day by day in modern semiconductors. This may include multiple power domains to support low power and full power modes and multiple clock domains ...
The problem with today's existing methodologies is that verification issubservient to design. This principle requires a shift in paradigm,especially in designing complex electronic systems. Why?
As state-of-the-art electronics propel the automotive, industrial, and aerospace industry into a future of more connectivity and autonomy, the development of safety-compliant semiconductors is ...
A technical paper titled “Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap” was published by researchers at University of Bremen and German Research ...
In the race to achieve high design performance and stringent power requirements, the VLSI world is moving quickly down the scaling curve to process technologies that ...