SAN JOSE, Calif., Oct 19, 2005-- SynTest Technologies, Inc., a leading supplier of Design-for-Test (DFT) tools, was granted 33 claims on Oct. 11, 2005 under United States Patent # 6,954,887 for its ...

For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...

Conducting product testing on printed circuit boards (PCBs) has the potential to become costly. Because of this, it’s easy for businesses to view PCB assembly testing as an expense without much value.

Companies specializing in circuit board and system design-for-test (DFT) tools are pursuing a variety of strategies to serve test and debug applications based on innovations they announced over the ...

As IC geometries shrink, the large, consolidated memory blocks within ICs are giving way to tens or even hundreds of smaller memory arrays distributed throughout each chip. These arrays serve as ...

Boundary Scan: What Is It? Boundary scan test techniques were first discussed in the late 1980s. At the time, experts believed that the growing complexity of chips would have a serious effect on an ...